META MTP IP Core

The META™ MTP 32-bit processor core is an embedded processor with a rich DSP feature set combined with efficient general purposes 32-bit processing, based on a multi-threaded architecture. It enables developers to create advanced DSP-intensive embedded processing solutions, utilizing separate hardware threads to manage the control and other non-DSP tasks, using the single cycle context switch capabilities to deliver exceptional real time performance and memory subsystem efficiency.

Traditional processors are often stalled due to multicycle memory latencies, or unproductive while performing context switches in software under control of a multitasking RTOS. META MTP supports multiple threads in hardware, each a virtual processor operating in parallel with no context switching overheads. One or more threads execute on each cycle depending upon the resource required by each thread, maximizing central ALU and memory utilization. Superthreading enables threads to run simultaneously provided they are not competing for the same resources.

Multi-threaded processor core
Rich DSP feature set
Configurable thread capabilities
I/D Caches and memory management unit (MMU)
Optional Floating Point Unit (FPU)
16-bit instruction set support
Fine-grain power management
Non-invasive debugging via JTAG
Coprocessor interface
Fully synthesizable
AMA™ (Automatic MIPS Allocation) for system load balancing

Unified core replaces multiple CPU and DSP cores
Latency tolerant – ideal for SoCs
Each virtual processor can run an independent OS
Scalable performance – add more hardware threads
Greater throughput – more work per clock cycle
Mature toolchain
Lower cost than multi-processor approach

META MTP Block Diagram