You might recognize Ingenic from the JZ4780 SoC powering our Creator Ci20 microcomputer or from the innovative, ultra-low power M200 chip at the heart of several recently announced smartwatches in China.

More recently, Ingenic has doubled down on the IoT market, releasing several chips optimized for wearables and connected devices, including a repackaged M200S and a power-optimized M150.

This week, Ingenic is introducing a new family of processors designed for general-purpose IoT and embedded computing. This new family is called the X Series and the first member is X1000, a highly integrated SoC sporting a number of interesting features.

MIPS-based CPU for low power consumption

At the heart of the chip sits a MIPS-based XBurst CPU clocked at a maximum frequency of 1 GHz. By adopting the MIPS architecture, the X1000 processor can really deliver on the energy efficiency front: standby power is just 0.2mW, while dynamic power sits at only 0.09mW/MHz.

Ingenic X1000 SoC for IoT - MIPS32The internal architecture of an Ingenic X1000 SoC

The Ingenic XBurst CPU delivers a mobile-level feature set, by including an integrated double-precision floating-point unit and multimedia/audio acceleration instructions for perfect lossless audio decoding.

In addition to the MIPS-based XBurst CPU, Ingenic X1000 includes a multimedia processing block, a security subsystem, and numerous I/O interfaces and peripherals.

Enhanced multimedia and security features

The integrated multimedia engine accommodates a high-quality audio codec that supports 24-bit resolution and a superior sampling rate, yet delivers a reduced signal-to-noise ratio of up to 95dB. There is also an always-on, low-power voice recognition engine that uses a variety of hardware filters to detect and act on voice commands. For example, developers can use a four-microphone array to perform noise cancelation and voice positioning. In addition, the camera block has a high performance hardware JPEG encoder that encodes HD JPEG pictures (1280×720) in under 30ms.

On the security front, Ingenic has equipped the X1000 SoC with a hardware AES and RSA encryption engine. The key size of the RSA cryptosystem supports up to 2048 bits, ensuring effective protection of private user data in the face of privacy attacks.

Ingenic X1000 targets connected devices everywhere

The Ingenic X1000 SoC is targeted at applications such as connected speakers, intelligent toys, image analytics (e.g. license plate recognition, face and fingerprint detection), or smart household appliances.

To help developers get started with the new X Series, Ingenic also manufactured a new evaluation board running Linux; codenamed Phoenix, the board includes the following components:

  • Processor: MIPS32-based Ingenic X1000 CPU + FPU + SIMD
  • Memory: 32MB LPDDR (integrated), 16MB flash memory, 1 x micro SD slot (up to 32GB)
  • Connectivity: 802.11b/g/n Wi-Fi, Bluetooth 4.0 (AP6212), 10/100M Ethernet
  • Peripherals and I/Os: 1 x USB OTG, 3 x microphone, 1 x JTAG
  • Expansion headers: Displayi/f, camerai/f, ZigBeei/f, etc.

Pricing for the Phoenix board starts at $200 per unit. If developers want to quickly integrate these new chips in their products, Ingenic will also supply another computing module named Halley2 that includes the X1000 SoC, 16MB of flash memory, a dedicated Wi-Fi and Bluetooth chip, and a power management IC.

Ingenic X1000 - Phoenix eval boardThe new Phoenix eval board includes an Ingenic X1000 SoC

I’ll keep an eye out for new devices using the new Ingenic X and M Series processors and report back from my trip in China at the start of November. Until then, follow us on social media (@ImaginationPR, @MIPSguru) for the latest news and announcements from Imagination and our ecosystem partners.