Walking the halls of Mobile World Congress in Barcelona, you’d think that everything is (and should be) about smartphones, tablets or wearables. However, this year marked a change for MWC – and several other big trade shows: many exhibitors were there to talk about providing solutions for fast growing markets beyond mobile; some of the more interesting announcements came from players in the networking, IoT or automotive space for example.
This brings me to Mobileye, a true pioneer in designing solutions for ADAS (Advanced Driver Assistance Systems). The company has a tight grip on the market, having a client base that counts over 20 car manufacturers including Audi, BMW, Fiat, Ford, General Motors, Honda, Nissan, Peugot, Citroen, Renault, Volvo and Tesla.
Recently, a prototype of Audi A7 used a MIPS-based Mobileye chip to complete a fully autonomous 560 mile drive; the car averaged up to 70 mph and changed lanes without any human intervention.
After introducing the A7 prototype, Audi has announced that its self-piloting zFAS system (short for zentrale Fahrerassistenzsteuergerät) will be developed by Delphi using technology from Mobileye.
The new Mobileye EyeQ4 chip sports multiple MIPS CPUs
Last month, Mobileye announced EyeQ4, a new chip built on a many-core architecture designed for computer vision processing in ADAS applications (i.e. collision detection and avoidance). EyeQ4 delivers the kind of performance you’d expect from a super-computer (2.5 TFLOPS) at an amazingly low 3 watts of power.
To achieve this impressive feat of engineering, Mobileye has designed a true heterogeneous architecture that combines several on-chip processors, including multiple MIPS CPUs:
- A cluster of quad-core MIPS I-class CPUs clocked at 1 GHz and sporting our innovative multi-threading technology for superior handling of data control and management.
- Multiple specialized Vector Microcode Processors (VMPs) that take care of ADAS-related image processing tasks (e.g. scaling and pre-processing, warping, tracking, lane markings detection, road geometry detection, filters and histograms, etc.)
- A MIPS M-class Warrior CPU that sits at the heart of the Peripheral Transport Manager (PTM), taking care of on- and off-chip general data transactions.
The diagram below offers you an overview of the processor’s architecture; you can also read more about it in the press release here:
MIPS M5150 is a top-class microcontroller for industrial applications
This announcement from Mobileye highlights two important advantages of the MIPS architecture.
First, it is a great example of how companies can use our multi-threading capabilities to boost performance in embedded applications that require superior compute capabilities at ultra-low power; you can read more about MIPS multi-threading (MIPS MT) here and see some relevant examples here and here.
However, for me personally, this product represents a very important landmark: it is the first instance of a MIPS Warrior CPU being announced publicly in a product. For those who’ve missed the MIPS M5150 launch, here’s a quick recap:
- Based on the latest MIPS Release 5 architecture, delivers class-leading performance (e.g. 1.57 DMIPS/MHz and 3.44 CoreMark/MHz).
- Superior virtualization support enables multiple guest operating systems to run in parallel on the same MCU.
- Improved anti-tamper security feature provides resistance to unwanted access to the processor.
- Optional FPU delivers high-performance support of both single and double precision instructions (IEEE 754).
These microcontroller-class MIPS processors are ideal for handling control functions in industrial applications, including automotive.
For example, MIPS MCUs can be deployed inside a car’s engine control unit (ECU); the processor gathers data from dozens of other sensors and calculates the best spark and fuel injector timing which leads to lower emissions and better mileage.
I’m very excited to see more and more partners using our technologies in innovative ways. For example, we’ve recently reported that MIPS CPUs are getting very good traction in networking processors, including 4G modems, mmWave communications or high-end 64-bit enterprise chips (see here, here or here, respectively).
Having a record number new agreements signed for MIPS Warrior and Aptiv CPUs (including a Tier 1 customer), we are definitely going to see some very impressive designs coming to market in the next year targeting a range of established and emerging markets.