13th July 2017

Imagination announces MIPSfpga 2.0: a comprehensive set of materials for teaching CPU architecture

Program puts practical experience at the heart of CPU education


LONDON, UK – 13 July, 2017 – Imagination Technologies (IMG.L) announces the launch of MIPSfpga 2.0, the next generation of its highly successful CPU education infrastructure. MIPSfpga 2.0 represents a comprehensive set of teaching materials for teaching computer architecture – including full, open access to a MIPS CPU to let students see the actual RTL code and study the inner workings of the processor. MIPSfpga 2.0 is part of the Imagination University Programme (IUP), which provides students with a unique opportunity to learn using a commercially available CPU architecture.

MIPSfpga 2.0 includes two expanded packages: a Getting Started Guide and MIPSfpga Labs which gives students practical exercises that take them deep into the CPU design. The Getting Started Guide enables students and professors to set up the MIPS core on an FPGA platform, program it and debug it. This package contains the unobfuscated RTL of the MIPS microAptiv CPU, reference guides, an installer for Open OCD and Codescape Essentials, plus other essential elements. The MIPSfpga Labs package has a total of 25 practical exercises – 16 more than in the original MIPSfpga materials – including a look at how the pipeline works, an exploration of cache memory, and creating User Defined Instructions (UDIs). A third package, MIPSfpga SoC, focuses on Linux loading and configuration.

Dr. Sarah Harris, associate professor, Dept. of Electrical and Computer Engineering, University of Nevada, Las Vegas (UNLV) and co-author of the MIPSfpga 2.0 teaching infrastructure, says, “With MIPSfpga 2.0, the number of practical exercises has increased considerably. The original MIPSfpga exercises focused on working with the core from the system level. With the new MIPSfpga Labs, students can start modifying the core itself and explore and modify the memory system. For students trying to understand the cache, how the pipeline works, how stalling affects performance, plus many other things, they can now get inside the core and find out for themselves. They can test different strategies and truly learn by doing. This is a game changer for CPU architecture education because it brings the theoretical, practical, and professional practice together for the first time.”

MIPSfpga was first released in 2015 and to-date is being used in 600+ universities and colleges around the world including Harvey Mudd College, Imperial College London, University College London (UCL), the University of Nevada, Las Vegas (UNLV), and many more.

Robert Owen, manager, Worldwide University Programme, Imagination Technologies, says, “When we first launched MIPSfpga, we transformed the teaching of CPU architecture. Never before had a commercial CPU been available in unobfuscated form to academics. Today, two years on, we are taking things further by placing greater emphasis on deep practical learning. The engineers of tomorrow need to know what a CPU looks like from the inside out. With MIPSfpga 2.0 we’re arming them with this knowledge and skill set.”

Accessing MIPSfpga 2.0

The MIPSfpga 2.0 CPU and related materials are available as free-to-download packages from the Imagination University Programme (IUP) website now. Academics should visit http://community.imgtec.com/university to register for the IUP and get started.

MIPSfpga Workshops The first MIPSfpga 2.0 workshop will be held on Thursday 7th September 2017 during the International Conference on Field-Programmable Logic and Applications (FPL) 2017 in Ghent, Belgium. The tutorial is open to academic faculty members. It includes short talks, demos, and hands-on activities. More information on the workshop and registration for the conference can be found here.

Supporting Quotes

“MIPSfpga helps students increase their engineering ability rather than just teaching them the theory of the CPU. I can show my students what a real commercial CPU looks like, helping increase their engineering ability and not just teaching them the theory. MIPSfpga 2.0 is about to be used in our postgraduate course and I believe the practical exercises will benefit our student extensively. It will greatly increase their knowledge of the CPU by enabling them to explore and modify the Verilog code and boot code of MIPSfpga and to quickly test new architectural features.”

–       Professor Dai Zhitao,

School of Computer, Beijing University of Posts and Telecommunications, China

 

“Zhe Jiang University was the first to use MIPS architecture in its classrooms in China. We’re very much looking forward to using MIPSfpga 2.0 with our students, especially in OS and computer hardware system integration, enabling them to truly modify and experiment with every aspect of the computer architecture.”

–       Professor Shi Qingsong,

Zhe Jiang University, China

 

“MIPSfpga 2.0 perfectly complements most of the concepts explained in the courses that I teach: Integrated Systems Architecture and Computer Organisation. It could also be used in many other courses taught at the University Complutense of Madrid including those about computer architecture, SoC design and HW/SW codesign. What I really like about MIPSfpga 2.0 is the availability of an industrial-level soft-core (microAptiv), which bridges the gap between existing curricula, usually based on simplified MIPS processors, and industrial-level work with a real MIPS core. This really helps students in upper-division undergraduate and master-level courses to work on projects extremely close to the ones that they will face in their professional careers.”

–       Associate Professor, Daniel Angel Chaver Martinez

University Complutense of Madrid, Spain

 

“At Nanyang Technology University, Singapore, we used MIPSfpga as part of a graduate-level class project. The students adopted the MIPS RTL and set out to make changes to it to support message-passing between a cluster of cores. We selected MIPS to support our course because we wanted the processor to be in VHDL/Verilog, a language familiar to the students already. The code was modular, easy to understand, and well-documented, and the feedback from students was very positive. We were able to take the class project and package it into an FPGA 2017 conference short paper, a noteworthy outcome for the students beyond simply fulfilling class requirements.”

–          Assistant Professor, Nachiket Kapre Nanyang Technology University, Singapore

 

“I have been involved with MIPSfpga and Imagination Technologies’ University Program from the start – I attended the first U.S. workshops and so it is great to see the momentum that is now behind MIPSfpga 2.0. Personally, I really like the quality of the instructional material and the open source nature of the project. I also like that MIPSfpga has been integrated into the Vivado IP flow.”

 

–          Westside Program Director, Roy Kravitz

Portland State University, USA

 

“At Ruhr University Bochum, Germany, we will be using MIPSfpga and MIPSfpga 2.0 to help our students realise SoCs on an FPGA and to connect peripherals to the processors. The course support materials are excellent, both from my perspective as the teacher and from the students’ point of view. We’ll be using MIPSfpga 2.0 from October 2017 and I expect that my students will benefit greatly from such comprehensive learning materials.”

–          Professor, Michael Huebner

Ruhr University Bochum, Germany

 

About the Imagination University Program The Imagination University Program (IUP) is designed to provide practical help to teachers around the world so that they can use Imagination’s technologies in courses and student projects. The focus is on providing the four vital elements needed to teach a course: a suitable hardware platform at a reasonable price, free software development tools, effective technical support, and excellent teaching materials that serve genuine teaching needs. The IUP is open to all members of academia. For more information, visit http://community.imgtec.com/university.

 


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