Design Optimisation Kits
Support for all stages of SoC and product development
Significantly accelerate your time-to-market
We understand that the interaction between the physical properties of advanced technology nodes and the functionality of the IP is key if these ever-increasing targets are to be met. To enable licensees to get the very best results from our IP we have created a DOK™ (Design Optimization Kit) with each core, or family. With our DOKs, customers leveraging our IP can achieve improved quality of results, optimised to their specialist requirements, and reduce their all-important time to market.
Leverage our expertise to hit the ground running
Each DOK provides a comprehensive and immediate design implementation solution for our IP licensees that allows them to significantly accelerate time-to-market by removing the need for a lengthy design exploration phase. Your back end design team can hit the ground running on day one, leveraging all our expertise and design familiarity to drive your implementation forward without having to perform numerous iterations to learn the optimal placement and dataflow of our complex high performance IP cores.
Reference floorplans, and floorplan guidance, proven to achieve stated goals.
Fully deployable reference flows based on industry leading EDA software.
Documentation of the entire flow, including derivation of floorplan.
Training material/classes available either on-site or via the web.